Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2005-05-06
2008-12-02
Louis-Jacques, Jacques (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
Reexamination Certificate
active
07461314
ABSTRACT:
A test device includes: the first reference clock generation unit for generating the first reference clock; the first test rate generation unit for generating the first test rate clock based on the first reference clock; the first driver unit for supplying the first test pattern to an electronic device based on the first test rate clock; the second reference clock generation unit for generating the second reference clock; the first phase synchronization unit for synchronizing the phase of the second reference clock with the phase of the first test rate clock; the second test rate generation unit for generating the second test rate clock based on the second reference clock having the synchronized phase; and the second driver unit for supplying the second test pattern to the electronic device based on the second test rate clock.
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Chiba Noriaki
Tsuruki Yasutaka
Advantest Corporation
Louis-Jacques Jacques
Merant Guerrier
Osha •Liang LLP
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