Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2005-11-01
2005-11-01
Lamarre, Guy (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S724000
Reexamination Certificate
active
06961884
ABSTRACT:
The present invention provides a JTAG mirroring circuit that augments the functionality of a JTAG circuit in an existing circuit design. The JTAG circuits include a TAP controller, an instruction register, and a plurality of data registers. The JTAG mirroring circuit of the present invention augments the functionality of pre-existing JTAG circuitry by introducing additional data registers that are multiplexed with data registers in the pre-existing JTAG circuit. Each of the additional data registers may perform functions that are not performed by data registers in the pre-existing JTAG circuit.
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Altera Corporation
Kerveros James C.
Lamarre Guy
Townsend and Townsend / and Crew LLP
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