Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
Reexamination Certificate
2010-04-21
2010-11-09
Tabone, Jr., John J (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Replacement of memory spare location, portion, or segment
C714S711000, C714S718000, C714S726000, C714S727000, C365S201000, C365S225700
Reexamination Certificate
active
07831870
ABSTRACT:
An integrated circuit containing memory includes IEEE 1149.1 (JTAG) controlled self-repair system that permits permanent repair of the memory after the integrated circuit has been packaged. The JTAG controlled self-repair system allows a user to direct circuitry to blow fuses using an externally supplied voltage to electrically couple or isolate components to permanently repair a memory location with JTAG standard TMS and TCK signals. The system may optionally sequentially repair more than one memory location using a repair sequencer.
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Fujiwara Yoshinori
Nomura Masayoshi
Dorsey & Whitney LLP
Micro)n Technology, Inc.
Tabone, Jr. John J
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