JTAG bus communication method and apparatus

Details JTAG bus communication method and apparatus JTAG bus communication method and apparatus

2011-01-18

2011-01-18

Gaffin, Jeffrey A (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714SE11155, C714S726000

Reexamination Certificate

active

07873889

ABSTRACT:
The present disclosure describes using the JTAG Tap's TMS and/or TCK terminals as general purpose serial Input/Output (I/O) Manchester coded communication terminals. The Tap's TMS and/or TCK terminal can be used as a serial I/O communication channel between; (1) an IC and an external controller, (2) between a first and second IC, or (3) between a first and second core circuit within an IC. The use of the TMS and/or TCK terminal as serial I/O channels, as described, does not effect the standardized operation of the JTAG Tap, since the TMS and/or TCK I/O operations occur while the Tap is placed in a non-active steady state.

REFERENCES:
patent: 5640521 (1997-06-01), Whetsel
patent: 6085344 (2000-07-01), Whetsel et al.

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