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Automated method of burn-in and endurance testing for embedded E

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Patent

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Automated multi-device test process and system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Automated scan chain sizing using Synopsys

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Automated scan insertion flow for control block design

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Patent

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Automated scan testing of DDR SDRAM

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate

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Automated system and processing for expedient diagnosis of...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Automated system for inserting and reading of probe points...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Automated test and characterization data analysis methods...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Automated test and characterization web services

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Automated test and characterization web services

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Automated test and evaluation sampling system and method

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Automated test system

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Automated testing system with minimized dependency on...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Automated tests for built-in self test

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate

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Automatic activation of ASIC test mode

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Automatic analog test and compensation with built-in pattern...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Automatic bit fail mapping for embedded memories with clock...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate

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Automatic built-in self-test of logic with seeding from...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate

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Automatic built-in self-test of logic with seeding from...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Automatic configuration and optimization of optical...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error count or rate
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