Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
Reexamination Certificate
2011-03-15
2011-03-15
Britt, Cynthia (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Digital logic testing
C714S734000
Reexamination Certificate
active
07908532
ABSTRACT:
This invention involves the use of the JTAG functional test patterns and exercisors to solve the problem of diagnosing broken scan chains in either a serial or a lateral broadside insertion manner across all latch system ports and to analyze the response data efficiently for the purpose of readily identifying switching and non-switching latches with the next to last non-switching latch being the point of the break within a defective scan chain(s). This comprehensive latch perturbation, in conjunction with iterative diagnostic algorithms is used to identify and to pinpoint the defective location in such a broken scan chain(s). This JTAG Functional test function and the JTAG test patterns ultimately derived therefrom, can take on different forms and origins, some external to a product and some internal to a product.
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Eckelman Joseph
Forlenza Donato O.
Forlenza Orazio P.
Gass Robert B.
Tran Phong T.
Britt Cynthia
International Business Machines - Corporation
Kinnaman, Jr. William A.
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