Leakage testing for differential signal transceiver
Logic circuit including a plurality of master-slave...
Low overhead memory designs for IC terminals
Method and apparatus for providing security for debug circuitry
Method and apparatus for supplying a clock to a device under...
Method and apparatus for testing dynamic logic using an...
Method and apparatus for testing variable voltage and variable i
Method and circuitry for testing a programmable logic device
Method and structure for a fault-free input configuration contro
Method and system for detecting a mode of operation of an...
Method and system for disabling a scanout line of a register...
Method for contact pad isolation
Method for solid state thermal electric logic
Method for testing an electronic circuit by logically combining
Methods and apparatus for injecting an external clock into a...
Methods and circuits for precise edge placement of test signals
Micro-granular delay testing of configurable ICs
Multi-clock integrated circuit with clock generator and...
Multiple pattern sequence generation based on inverting non-line
Multiple voted logic cell testable by a scan chain and...