Electronic digital logic circuitry – With test facilitating feature
Reexamination Certificate
2006-03-28
2006-03-28
Tran, Anh Q. (Department: 2819)
Electronic digital logic circuitry
With test facilitating feature
C326S009000, C326S015000
Reexamination Certificate
active
07019550
ABSTRACT:
A method includes providing a device under test (DUT) which has an input port and an output port. The DUT also has a squelch detector which is coupled to receive a signal from the input port. The DUT also has a receiver amplifier coupled to receive a signal from the input port. In addition, the DUT also has a transmitter to transmit data signals from the output port. The method further includes providing a loopback connection from the output port to the differential input port. The method also includes controlling the transmitter to transmit a test signal from the output port to the input port. The method includes monitoring at least one of respective outputs of the receiver amplifier and the squelch detector to determine whether a leakage condition exists in the DUT. Other embodiments are described and claimed.
REFERENCES:
patent: 2005/0146346 (2005-07-01), Kakizawa et al.
Meixner Anne
Vakil Kersi H.
Wehage Eric R.
Buckley Maschoff & Talwalkar LLC
Intel Corporation
Tran Anh Q.
LandOfFree
Leakage testing for differential signal transceiver does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Leakage testing for differential signal transceiver, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Leakage testing for differential signal transceiver will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3534973