Method and circuitry for testing a programmable logic device

Details Method and circuitry for testing a programmable logic device Method and circuitry for testing a programmable logic device

1993-06-11

1995-04-25

Hudspeth, David R.

Electronic digital logic circuitry

With test facilitating feature

371 722, 326 45, 326 21, H03K 19177

Patent

active

RE0349160

ABSTRACT:
A test configuration register (80) associated with a programmable memory device (88), wherein the signals at the outputs of the test configuration register force elements of the memory device into certain logic states to enable the device to be tested without programming the device's logic array (22).

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