Method and structure for a fault-free input configuration contro

Details Method and structure for a fault-free input configuration contro Method and structure for a fault-free input configuration contro

1994-11-18

1995-08-29

Westin, Edward P.

Electronic digital logic circuitry

With test facilitating feature

G01R 19155

Patent

active

054463998

ABSTRACT:
A unique configuration control mechanism is disclosed which provides a fault-free verification of digital hardware and software modules, as well as verification of the logic control circuits used to drive said modules.

REFERENCES:
patent: 3789205 (1974-01-01), James
patent: 4241307 (1980-12-01), Hong
patent: 4276619 (1981-06-01), Rickenbacker
patent: 5359291 (1994-10-01), Dommerich, III

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