High speed configuration independent programmable macrocell
High speed customizable logic array device
High speed dynamic differential logic circuit employing capacita
High speed flip-flop for gate array
High speed interface for a programmable interconnect circuit
High speed interface for a programmable interconnect circuit
High speed mask register for a configurable cellular array
High speed parallel/serial link for data communication
High speed pipeline method and apparatus
High speed PLD "AND" array with separate nonvolatile memory
High speed processing flip-flop
High speed product term allocation structure supporting logic it
High speed product term assignment for output enable, clock, inv
High speed programmable logic architecture
High speed programmable logic architecture
High speed programmable logic architecture
High speed programmable logic architecture
High speed programmable macrocell with combined path for storage
High speed tristate bus with multiplexers for selecting bus driv
High speed zero DC power programmable logic device (PLD)...