High speed processing flip-flop

Details High speed processing flip-flop High speed processing flip-flop

1994-09-30

1995-06-20

Hudspeth, David R.

Electronic digital logic circuitry

Multifunctional or programmable

Sequential or with flip-flop

327211, 327212, H03K 19173

Patent

active

054263808

ABSTRACT:
A high speed processing flip-flop contains a header circuit and a pulse flip-flop circuit. The header circuit is a clock pre-processing circuit that generates clock pulses for operation of the pulse flip-flop circuit, and the pulse flip-flop circuit is a single stage latch. The header circuit contains functional logic including the flip-flop functionality for the high speed processing flip-flop, and any additional processing functions, such as multiplexing. The header circuit also contains a pulse modulator that generates selected clock pulses, based on the functional logic, for the pulse flip-flop circuit. The pulse flip-flop circuit contains storage, a driver circuit, and, for each data input, an input buffer, and a pass gate. The pulse flip-flop circuit couples the data to the driver circuit and storage during an active clock pulse for the corresponding data. Consequently, data input to the pulse flip-flop is not delayed by logic processing.

REFERENCES:
patent: 5023484 (1991-06-01), Pathak et al.
patent: 5028814 (1991-07-01), Sung et al.
patent: 5164612 (1992-11-01), Kaplinsky
patent: 5295174 (1994-03-01), Shimizu

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