High speed programmable logic architecture

Details High speed programmable logic architecture High speed programmable logic architecture

1994-01-27

1996-04-02

Westin, Edward P.

Electronic digital logic circuitry

Multifunctional or programmable

Array

326 41, 326 17, H03K 19177

Patent

active

055044409

ABSTRACT:
Architecture for a programmable logic device is described which can operate at substantially faster clock rates than present programmable logic devices. Instead of employing passive circuit elements to interconnect the programmable logic elements and the input and output data buses, controllable active driver circuits are employed. These circuits eliminate essentially all of the resistance present in prior art passive connections.

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