High speed product term assignment for output enable, clock, inv

Details High speed product term assignment for output enable, clock, inv High speed product term assignment for output enable, clock, inv

1995-09-26

1997-09-23

Westin, Edward P.

Electronic digital logic circuitry

Multifunctional or programmable

Array

326 39, H03K 738, H03K 19173

Patent

active

056708963

ABSTRACT:
A macrocell for a programmable logic device includes private product term assignments to provide various functions including set and reset, output enable, clocking, and inversion. Each of these additional functions is provided by assigning one of the product terms associated with the macrocell to perform one of these functions locally. By means of additional logic circuitry these functions are achieved either singly or in combination for a particular macrocell, thus improving macrocell flexibility and in some cases conserving pins of the chip of which the programmable logic array is a part.

REFERENCES:
patent: 4903223 (1990-02-01), Norman et al.
patent: 5191243 (1993-03-01), Shen et al.
patent: 5300830 (1994-04-01), Hawes
patent: 5357153 (1994-10-01), Chiang et al.
patent: 5450021 (1995-09-01), Chiang
patent: 5450608 (1995-09-01), Steele

Affiliated with

Also associated with

Rating

High speed product term assignment for output enable, clock, inv does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with High speed product term assignment for output enable, clock, inv, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and High speed product term assignment for output enable, clock, inv will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1939803