High speed dynamic differential logic circuit employing capacita

Electronic digital logic circuitry – Multifunctional or programmable – Array

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326 40, H03K 19177

Patent

active

059594675

ABSTRACT:
The present invention discloses a differential logic circuit and sensing method providing differential sensing with greater speed and higher density than prior art techniques. One or more input signals are provided to a logic array and two output signals are produced from the logic array wherein one output signal of the logic array is a bit-line and one output signal of the logic array is a bit-bar-line as a reference signal, wherein both signals are provided as input signals to a differential sense amplifier having a binary output signal. The bit-line and the bit-bar-line are precharged to the same voltage level and a controlled input source-grounded transistor having less than fill drive strength is coupled to the bit-bar-line. A source-grounded transistor is coupled to each input signal of the logic array and is programmable to the bit-line by coupling the drain of the source-grounded transistor to the bit-line. A corresponding sourceless transistor, having a gate and a drain, but no source, is coupled to each input signal of the logic array and is programmable to the bit-bar-line by coupling the drain of the sourceless transistor to the bit-bar-line. The source-grounded transistors and the corresponding sourceless transistors are programmed identically providing substantially the same capacitance load on the bit-line and the bit-bar-line.

REFERENCES:
patent: 4429238 (1984-01-01), Harrison
patent: 4761571 (1988-08-01), Golke et al.
patent: 4920515 (1990-04-01), Obata
patent: 5327379 (1994-07-01), Pascucci
patent: 5563827 (1996-10-01), Lee et al.
patent: 5600263 (1997-02-01), Trimberger et al.

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