High speed programmable logic architecture

Electronic digital logic circuitry – Multifunctional or programmable – Array

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326 41, H03K 19177

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active

057421790

ABSTRACT:
Architecture for a programmable logic device is described which can operate at substantially faster clock rates than present programmable logic devices. Instead of employing passive circuit elements to interconnect the programmable logic elements and the input and output data buses, controllable active driver circuits are employed. These circuits eliminate essentially all of the resistance present in prior art passive connections.

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