Tap and matched filter arrangement
Technique for preconditioning I/Os during reconfiguration
Technique for preconditioning I/Os during reconfiguration
Technique to test an integrated circuit using fewer pins
Techniques for combining volatile and non-volatile...
Techniques for configuring programmable logic using on-chip...
Techniques for configuring programmable logic using on-chip...
Techniques for implementing hardwired decoders in...
Techniques for optimizing design of a hard intellectual...
Techniques for programming programmable logic array devices
Techniques for programming programmable logic array devices
Techniques for programming programmable logic array devices
Techniques for programming programmable logic array devices
Techniques for programming programmable logic array devices
Techniques for providing increased flexibility to...
Techniques for providing switchable decoupling capacitors...
Test methodology for direct interconnect with multiple fan-outs
Three dimensional integrated circuits
Three dimensional integrated circuits
Three dimensional integrated circuits