High speed programmable logic architecture

Details High speed programmable logic architecture High speed programmable logic architecture

1997-01-16

1998-09-15

Santamauro, Jon

Electronic digital logic circuitry

Multifunctional or programmable

Array

326 39, H03K 19177

Patent

active

058084797

ABSTRACT:
Architecture for a programmable logic device is described which can operate at substantially faster clock rates than present programmable logic devices. The PLD uses BiCMOS circuit elements to make use of the speed advantages of bipolar technology while also enjoying the limited power consumption of CMOS technology.

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