High speed tristate bus with multiplexers for selecting bus driv

Details High speed tristate bus with multiplexers for selecting bus driv High speed tristate bus with multiplexers for selecting bus driv

1996-02-02

1997-10-14

Westin, Edward P.

Electronic digital logic circuitry

Multifunctional or programmable

Array

H03K 19177

Patent

active

056776381

ABSTRACT:
According to the invention, a structure is provided for driving a bus line that is both fast and small. Instead of a plurality of tristate buffers, one for each input signal, a plurality of multiplexers is connected into a chain. The tristate enable line of the tristate buffer becomes the control line for enabling the multiplexer to place its own input signal into the chain instead of propagating the signal already in the chain. A buffer element then drives the resulting signal onto an output line of the chain. One embodiment of the invention includes lookahead logic similar to a lookahead carry chain. This allows large numbers of input lines to be connected to a bus line while retaining high speed. An embodiment implements the lookahead feature using AND gates and OR gates and thereby further increases speed and reduces size.

REFERENCES:
patent: Re34363 (1993-08-01), Freeman
patent: 5376844 (1994-12-01), Pedersen et al.
patent: 5506517 (1996-04-01), Tsui et al.
patent: 5600264 (1997-02-01), Duong et al.
"The Programmable Logic Data Book", 1994, available from Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124, pp. 2-16 through 2-24.
"The XC5200 Logic Cell Array Family Technical Data", Oct. 1995, available from Xilinx, Inc., 2100 Logic Drive, San Jose, CA 95124, pp. 1 through 20.

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