Transmission line bounding models
Transparent re-mapping of parallel computational units
Trial placement system with cloning
Triangular assignment of pins used for diagonal...
Triangular assignment of pins used for diagonal...
Trough adjusted optical proximity correction for vias
Trusted computing platform
Trusted computing platform using a trusted device assembly
Tunable integrated circuit design for nano-scale technologies
Tuning programmable logic devices for low-power design...
Tuple propagator and its use in analysis of mixed clock...
Turn architecture for routing resources in a field...
Two dimensional compaction system and method
Two moment RC delay metric for performance optimization
Two pole coupling noise analysis model for submicron...
Two-dimensional C-element array
Two-dimensional to three-dimensional VLSI design
Two-stage clock tree synthesis with buffer distribution...
Type configurable memory methodology for use with metal...
Unified layer stack architecture