Tunable integrated circuit design for nano-scale technologies

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S100000, C716S101000, C716S104000, C716S110000, C716S115000, C716S132000, C716S136000, C716S138000, C703S002000, C703S013000, C703S014000, C326S026000, C326S027000, C327S051000, C327S052000, C327S053000, C327S063000, C327S066000, C327S246000

Reexamination Certificate

active

07945868

ABSTRACT:
The invention discloses a method for tuning nano-scale analog-circuit designs in order to reduce random-device mismatches and optimize said design, where nano-scale devices potentially have large-scale process variations. The method includes providing a tunable circuit topology, wherein each nano-scale device comprises a single component or comprises multiple parallel components. Each component is decomposed into multiple discrete sub-components, wherein each said sub-component either operates in parallel with other like components to effectively operate like one bigger component. The sub-components are subjected to a dynamic-programming process to adaptively select the sub-components to be kept operational, while configuring the nonselected sub-components to be nonoperational, based on the measurement of at least one operational parameter.

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