Scan design for double-edge-triggered flip-flops
Scan diagnosis system and method
Scan insertion with bypass login in an IC design
Scan path timing optimizing apparatus determining connection...
Scattering bar OPC application method for mask ESD prevention
Scheduler for schematic related jobs
Scheduler, method and program for scheduling, and apparatus...
Scheduling events in a boolean satisfiability (SAT) solver
Scheduling hardware generated by high level language...
Scheduling logic on a programmable device implemented using...
Scheduling method for high-level synthesis and recording medium
Schematic diagram generation and display system
Schematic driven placement method and program product for...
Schematic organization tool
Scripted, hierarchical template-based IC physical layout system
Sea-of-cells array of transistors
Sea-of-cells array of transistors
Search algorithm for inheriting clock contexts in hardware...
Searching for a path through a circuit
Searching for counter-examples intelligently