Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-09-17
2008-03-25
Do, Thuan (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
07350180
ABSTRACT:
A search algorithm supports inherited clock contexts within functions written in a Hardware Description Language. For each function, a parser generates a corresponding node tree. Each clock context node has an associated clock signal and active clock edge. The edge can be an inherited type, whereas conventionally only absolute edge types are allowed. During elaboration processing, for each clock context node encountered with an associated directly inherited edge, the algorithm searches up the node tree from the encountered node. It looks for a controlling clock context node with an associated clock signal that is connected to the encountered context's associated clock signal. If a controlling context is found, then its associated edge replaces the encountered context node's associated edge. The connection requirement supports multi-clock circuits. If necessary, the search can move up a function hierarchy. An alternative oppositely inherited edge is replaced by the opposite of the found edge.
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