Scan path timing optimizing apparatus determining connection...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C716S030000, C716S030000, C716S030000, C716S030000, C716S030000, C714S726000, C714S729000

Reexamination Certificate

active

10445832

ABSTRACT:
An intra-area connection order determining unit determines at random orders of connection of scan path circuits in each area divided by an placement area dividing unit. An inter-area connection order determining unit determines orders of connection of the scan path circuits between the areas such that length of interconnection between the areas divided by the placement area dividing unit becomes short. Accordingly, length of interconnection between the scan paths can be locally made short, reducing congestion of interconnections and generation of hold time errors.

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Narayanan et al., “SIESTA: a multi-facet scan design system”, Sep. 7-10, 1992, Design Automation Conference, 1992. EURO-VHDL '92, EURO-DAC '92, European, pp. 246-251 □□.
Kobayashi et al., “Scan-chain optimization algorithms for multiple scan-paths”, Feb. 10-13, 1998, Design Automation Conference 1998. Proceedings of the ASP-DAC '98. Asia and South Pacific,□□pp. 301-306□□.

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