Schematic driven placement method and program product for...

Details Schematic driven placement method and program product for... Schematic driven placement method and program product for...

2006-07-25

2006-07-25

Lin, Sun James (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

07082595

ABSTRACT:
A physical device layout tool and method. The method and tool receive a user provided schematic with circuit data and placement parameters, including defaults. Further inputs include a definition of cell physical position in the horizontal direction, a definition of the cell's vertical stacking level, a definition of the cell orientation, a specification of vertical alignment of multiple cell instances, and a definition of vertical spacing between 2 adjacent cell instances. These input parameters are used to generate a layout with the placed circuit elements.

REFERENCES:
patent: 5768479 (1998-06-01), Gadelkarim et al.
patent: 5872952 (1999-02-01), Tuan et al.
patent: 6496715 (2002-12-01), Lee et al.
patent: 2005/0028113 (2005-02-01), Lin et al.

Affiliated with

Also associated with

Rating

Schematic driven placement method and program product for... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Schematic driven placement method and program product for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Schematic driven placement method and program product for... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3595321