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First time silicon and proto test cell notification

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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Fitting for incremental compilation of electronic designs

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Patent

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Flash configuration cache

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Flash memory compiler with flexible configurations

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Flash-based anti-aliasing techniques for high-accuracy high...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Flash-based updating techniques for high-accuracy high...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Flexible cache architecture using modular arrays

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Flexible design for memory use in integrated circuits

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Flexible I/O routing resources

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Flexible preamble processing for detecting a code sequence

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Flexible width cell layout architecture

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Flip chip trace library generator

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Flip-flop insertion in a circuit design

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Flip-flop insertion method for global interconnect pipelining

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Flip-flop insertion method for global interconnect pipelining

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Floor plan evaluating method, floor plan correcting method,...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Floor plan tester for integrated circuit design

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate

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Floor-planning technique applied to circuit design in which...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Floorplan evaluation, global routing, and buffer insertion...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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Floorplan visualization method using gate count and gate...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
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