Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2007-08-14
2007-08-14
Whitmore, Stacy A (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
10713492
ABSTRACT:
A method for designing and using a partially manufactured semiconductor product is disclosed. The partially manufactured semiconductor product, referred to as a slice, contains a fabric of configurable transistors and at least an area of embedded memory. The method contemplates that a range of processors, processing elements, processing circuits exists which might be manufactured as a hardmacs or configured from the transistor fabric of the slice. The method then evaluates all the memory requirements of all the processors in the range to create a memory superset to be embedded into the slice. The memory superset can then be mapped and routed to a particular memory for one of the processors within the range; ports can be mapped and routed to access the selected portions of the memory superset. If any memory is not used, then it and/or its adjoining transistor fabric can become a landing zone for other functions or registers or memories.
REFERENCES:
patent: 6538468 (2003-03-01), Moore
patent: 6640333 (2003-10-01), Hamlin
patent: 6748577 (2004-06-01), Bal
patent: 6769107 (2004-07-01), Watkins
patent: 6772230 (2004-08-01), Chen et al.
patent: 6779168 (2004-08-01), Hamlin
patent: 6966044 (2005-11-01), Reuland et al.
patent: 7000165 (2006-02-01), Asson et al.
patent: 7007264 (2006-02-01), Baxter
patent: 2001/0010073 (2001-07-01), Janik et al.
patent: 2003/0131335 (2003-07-01), Hamlin
patent: 2004/0025136 (2004-02-01), Carelli
patent: 2004/0040005 (2004-02-01), Carison
patent: 2004/0060031 (2004-03-01), Cernea
patent: 2004/0111690 (2004-06-01), Reuland et al.
patent: 2004/0139415 (2004-07-01), Hamlin
Emerson Steven Mark
McKenney Douglas J
LSI Corporation
Whitmore Stacy A
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