Flip-flop insertion in a circuit design

Details Flip-flop insertion in a circuit design Flip-flop insertion in a circuit design

2005-06-21

2005-06-21

Siek, Vuthe (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

06910195

ABSTRACT:
A method and apparatus for inserting flip-flops in a circuit design between a driver and one or more receiver(s) comprising generating a candidate solution to assign the flip-flop at the node in the circuit, calculating a margin at the driver, calculating the margin at the receiver, and inserting the flip-flop at the node to simultaneously maximize the margin at the driver and the margin at the receiver. Furthermore, the method and apparatus determines whether to insert a second flip-flop at a second node in the circuit, and inserting the second flip-flop at the second node in the circuit such that a delay between the flip-flop and the second flip-flop is substantially equal to a clock period.

REFERENCES:
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patent: 6550044 (2003-04-01), Pavisic et al.
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