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1.8 volt output buffer on flash memories

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
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256 Meg dynamic random access memory

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate

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4N pre-fetch memory data transfer system

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
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A gaas register file having a plurality of latches

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
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Activator units for identification systems and systems employing

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent

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Address selecting circuitry for semiconductor memory device

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
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Address signal generator in a semiconductor memory

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate

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Adiabatic differential driver

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
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Adjustable output driver circuit

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent

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Adjusting a digital delay function of a data memory unit

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
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Alternatively addressed semiconductor memory array

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
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Apparatus and a method for a data output circuit in a...

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate

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Apparatus and method for a radiation resistant latch

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate

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Apparatus and method for reading the default value of a...

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
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Apparatus and method for reducing write recovery time in a rando

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent

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Apparatus and method for tracking between data and echo clock

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate

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Apparatus and methods for selectively disabling outputs in...

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate

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Apparatus for outputting data using common pull-up/pull-down...

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
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Apparatus for performing desired logical function

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Patent

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Apparatus for receiving/transmitting signals in an input/output

Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
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