Static information storage and retrieval – Read/write circuit – Having particular data buffer or latch
Reexamination Certificate
2001-05-21
2004-11-02
Lam, David (Department: 2818)
Static information storage and retrieval
Read/write circuit
Having particular data buffer or latch
C365S189110, C365S148000
Reexamination Certificate
active
06813192
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an apparatus and method for reading the default value of a peripheral component, especially to an apparatus and method for reading the default value of a peripheral component which is set up by the circuit board where the peripheral component is situated, or stored in a memory.
2. Description of Related Art
In the industry nowadays, every peripheral component, including a USB (Universal Series Bus) devices, have their own specific default values, such as a vender ID, product ID, product version or specification, such as the parameter of an operation current. Since a product line expansion is always ongoing, the use of default values will not be enough to represent the identifications of the products. One of the solutions for this problem is to define the default value using logic hard-wired configuration inside the peripheral component. For example, using four bits to define 16 kinds of the product identification. The disadvantage of the above method is that the number of the default value is not easily expandable. Another solution is to install a ROM inside the peripheral memory, and mark the product identification inside the ROM. The disadvantage of this is that it complicates the process of IC manufacturing and costs a lot of money. The other solution is to install a flash memory inside the peripheral component, and a system designer to write the default value to the flash memory through the software driver of the host. The disadvantage of this method is that it is inconvenient to install, and manufacturing cost will increase when the flash memory is installed inside the peripheral component.
From the description mentioned above, the apparatus for reading the default value of a peripheral component does not satisfy current market needs.
SUMMARY OF THE INVENTION
Accordingly, the object of the present invention is to resolve the drawbacks of in expansibility, inconvenience in installation and higher manufacturing cost in the prior art. In order to accomplish the objective, the present invention proposes an apparatus and method for reading the default value of a peripheral component. The default value of the peripheral component is set up by the circuit board where the peripheral component is situated, or stored inside a memory means. When the system starts, the peripheral component first reads the setup of the circuit board. If there is no default value in the circuit board, the memory will be read. The setup method of the circuit board is to connect a plurality of I/O signal lines of the peripheral component to a power end or ground end on the circuit board, and the plurality of I/O signal lines are connected to a voltage-controllable end through a plurality of pull resistors.
When a suspend signal is enabled and the way to setup the default value of the peripheral component in the circuit board is by way of connecting the plurality of I/O signal lines to the power end of the circuit board, the voltage-controllable end will be turned to logic one to save power consumption. When a suspend signal is enabled and the way to setup the default value of the peripheral component in the circuit board is by way of connecting the plurality of I/O signal lines to the ground end of the circuit board, the voltage-controllable end will be turned to logic zero to save power consumption.
When a suspend signal is enabled and the way to setup the default value of the peripheral component is determined by the content of the memory, the voltage-controllable end will be turned to logic zero to disable the memory to save power consumption.
Besides, if the default value of the peripheral component is determined by connecting to power end or ground end on the circuit board, the memory could be omitted to save money.
The apparatus of the present invention mainly comprises a plurality of bidirectional buffers, a register, a combinational logic, a control unit and a plurality of pull resistors. The plurality of bidirectional buffers have an ability to determine the direction of data transmissions. The initial ends of the bidirectional buffers are connected to said peripheral component, and the other ends of the bidirectional buffers are connected to the memory or the power or ground end on the circuit board. The combinational logic is connected to the initial end of the bidirectional buffers for determining if the default value of the peripheral component is set up by the circuit board. The register is used to store the output of the combinational logic. The control unit is connected to the output of the register and reset signal, and a suspend signal on said circuit board is used to generate a pull driving signal and a control signal to determine the direction of data transmissions of said bidirectional buffers. The plurality of pull resistors have an initial end and another end, the first end of the pull resistors is connected to the second end of the bidirectional buffers, and the second end of the pull resistors is connected to the pull driving signal of the control unit.
The method of the present invention mainly comprises the following steps. First, after a reset signal is enabled, the plurality of I/O signals are read and analyzed. If the plurality of I/O signals of the peripheral component are connected to a plurality of pull resistors with the state of pulling down and the values of the plurality of I/O signals are all logic zero, or the plurality of I/O signals of the peripheral component are connected to a plurality of pull resistors with the state of pulling up and the values of the plurality of I/O signals are all logic one, it represents the circuit board has not set up the default value of the peripheral component. On the contrary, if the condition is satisfied, it represents the circuit board has set up the default value of the peripheral component. Next, if the circuit board does not set up the default value of the peripheral component, the default value of the peripheral component stored in said memory is read, and the peripheral component is set up according to the default value. If the circuit board has set up the default value of the peripheral component, the peripheral component is set up according to the values read from the I/O signals. After the peripheral component is set up, the memory will be disabled to obtain the power-saving effect.
REFERENCES:
patent: 5956274 (1999-09-01), Elliott et al.
Hwang Bar-Chung
Rong Iun-Bohr
Ladas & Parry
Lam David
Winbond Electronics Corporation
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