1.8 volt output buffer on flash memories

Details 1.8 volt output buffer on flash memories 1.8 volt output buffer on flash memories

1997-04-11

1999-05-11

Nelms, David

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

326 26, 326 27, 327108, 327112, G11C16/04

Patent

active

059035005

ABSTRACT:
A high-speed output buffer for a nonvolatile writeable memory is described. The high-speed output buffer receives signals from the nonvolatile writeable memory having a pair of logic levels. The high-speed output buffer provides output signals having a pair of logic levels that may differ from the pair of logic levels of the signal received from the nonvolatile writeable memory. The high-speed output buffer comprises two inverters, a pull-up device, and a circuit with a relatively low voltage drop. The circuit with the relatively low voltage drop causes the high-speed output buffer to receive signals having one pair of logic levels while providing high-speed output signals having another pair of logic levels which may differ from the pair of logic levels of the received signal. The high-speed output buffer is coupled to a different power supply output from the nonvolatile writeable memory. The high-speed output buffer uses input and output signals having logic levels compatible with complementary metal-oxide semiconductor (CMOS) technology.

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