Apparatus and method for reducing write recovery time in a rando

Details Apparatus and method for reducing write recovery time in a rando Apparatus and method for reducing write recovery time in a rando

1985-12-18

1988-05-10

Moffitt, James W.

Static information storage and retrieval

Read/write circuit

Having particular data buffer or latch

365230, G11C 700

Patent

active

047440597

ABSTRACT:
An apparatus for reducing the write recovery time of a memory during a write operation is responsive to the detection of a write enable signal for causing the data being written into a selected memory cell to be immediately coupled out on the memory's corresponding output data line independent of the speed at which the data is actually written into the memory cell. The state of a cache memory element is set to reflect this data state such that when the write enable signal goes off, the cache memory element maintains the present state of said output data line. The cache memory element is overridden as the corresponding memory cell reaches a steady state condition at the end of the write operation.

REFERENCES:
patent: 4611299 (1986-09-01), Hori et al.

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