LandOfFree - US Patents - Listing for Semiconductor device manufacturing: process,Making field effect device having pair of active regions...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Disposable spacer process for field effect transistor...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Disposable spacer technology for device tailoring

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Disposable spacer technology for reduced cost CMOS processing

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Disposable spacer technology for reduced cost CMOS processing

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Disposable spacers for improved array gapfill in high...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Disposable-spacer damascene-gate process for SUB 0.05 &mgr;m...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate

Distributed constant circuit with active element

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having junction gate

Distributed high voltage JFET

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

DMOS architecture using low N-source dose co-driven with P-body

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

DMOS device structure, and related manufacturing process

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

DMOS device with sealed channel processing

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

DMOS fabrication process implemented with reduced number of mask

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

DMOS process module applicable to an E.sup.2 CMOS core process

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

DMOS transistor structure with gate electrode trench for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Dopant implantation method using multi-step implants

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Dopant profile tuning for MOS devices by adapting a spacer...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Doped polysilicon to retard boron diffusion into and through thi

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Doped spacer liner for improved transistor performance

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Doped structure for finfet devices