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Floating-gate structure with dielectric component

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Flow process for producing non-volatile memories with...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Fluorine plasma treatment of high-k gate stack for defect...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Focused ion beam treatment method and semiconductor device...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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Folded bit line DRAM with vertical ultra thin body transistors

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Folded trench and rie/deposition process for high-value capacito

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Fork-like memory structure for ULSI DRAM and method of fabricati

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Formation method of an array source line in NAND flash memory

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Formation method of interconnection in semiconductor device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Formation method of interconnection in semiconductor device

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Formation of 5F2 cell with partially vertical transistor and...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Formation of a capacitor using a sacrificial etch stop

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Formation of a cylindrical polysilicon module in dram technology

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Formation of a disposable spacer to post dope a gate conductor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Formation of a double gate structure

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Formation of a frontside contact on silicon-on-insulator...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Formation of a shallow trench isolation structure in...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Formation of a stacked cylindrical capacitor module in the DRAM

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Formation of a super steep retrograde channel

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Formation of a thin oxide protection layer at poly sidewall and

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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