Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
Reexamination Certificate
2005-06-17
2009-02-03
Trinh, Michael (Department: 2822)
Semiconductor device manufacturing: process
Making field effect device having pair of active regions...
Having insulated gate
C438S260000, C438S264000, C438S593000, C257S315000, C257S317000, C257S321000
Reexamination Certificate
active
07485526
ABSTRACT:
Floating-gate memory cells having a floating gate with a conductive portion and a dielectric portion facilitate increased levels of charge trapping sites within the floating gate. The conductive portion includes a continuous component providing bulk conductivity to the floating gate. The dielectric portion is discontinuous within the conductive portion and may include islands of dielectric material and/or one or more contiguous layers of dielectric material having discontinuities.
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T.C. Chang et al.; Quasisuperlattice storage: A concept of multilevel charge storage; Jul. 12, 2004; Applied Physics Letters, vol. 85 No. 2; pp. 248-250.
Mouli Chandra
Sandhu Gurtej S.
Leffert Jay & Polglaze P.A.
Micro)n Technology, Inc.
Trinh Michael
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