Formation of a capacitor using a sacrificial etch stop

Details Formation of a capacitor using a sacrificial etch stop Formation of a capacitor using a sacrificial etch stop

1997-01-13

1998-05-05

Chaudhari, Chandra

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

438256, 438648, H01L 218242

Patent

active

057473692

ABSTRACT:
A method is described for forming capacitors in integrated circuits by making the capacitors concurrently with the fabrication of the interconnection wiring levels. A single additional photolithographic step and two depositions are required to form capacitors within each wiring level. A key feature of the invention is the use of an etch-stop to protect the capacitor dielectric during contact or via etching. The storage plates of the capacitor are formed from two successive conductor levels which can include polysilicon levels as well. The process is particularly suited to the manufacture of logic circuits and can be used effectively in MOSFET, bipolar and BiCMOS processes.

REFERENCES:
patent: 5143861 (1992-09-01), Turner
patent: 5371028 (1994-12-01), Koh
patent: 5455204 (1995-10-01), Dobuzinsky et al.
patent: 5510630 (1996-04-01), Agarwal et al.
patent: 5523596 (1996-06-01), Ohi et al.

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