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DMOS transistor structure with gate electrode trench for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Dopant implantation method using multi-step implants

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Dopant profile tuning for MOS devices by adapting a spacer...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Doped polysilicon to retard boron diffusion into and through thi

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Doped spacer liner for improved transistor performance

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Doped structure for finfet devices

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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Doped structures containing diffusion barriers

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Doped WGe to form dual metal gates

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Doping mask and methods of manufacturing charge transfer...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Doping method, doping apparatus, and control system for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate
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Doping methods for fully-depleted SOI structures, and device...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Charge transfer device
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Doping of semiconductor fin devices

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer
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Doping of thin amorphous silicon work function control...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Doping technique for MOS devices

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Dotted channel MOSFET and method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Dotted channel MOSFET and method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Double anneal with improved reliability for dual contact...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Double coding processes for mask read only memory (ROM) devices

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Double diffused field effect transistor having reduced...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Double diffused MOS device and method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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