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Physically defined varactor in a CMOS process

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Pillar cell flash memory technology

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Pillar CMOS structure

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Pillar devices and methods of making thereof

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Pillar transistor incorporating a body contact

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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PIP capacitor for split-gate flash process

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Pitch multiplication process

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Pitch multiplied mask patterns for isolated features

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Pixel and imager device having high-k dielectrics in...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Pixel cell with high storage capacitance for a CMOS imager

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Pixel design to improve photodiode capacitance and method of...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Pixel structure and method for manufacturing the same

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Pixel structure and method for manufacturing the same

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Placement method for decoupling capacitors

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Planar DMOS transistor fabricated by a three mask process

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Planar substrate devices integrated with FinFETs and method...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Planar substrate devices integrated with FinFETs and method...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Planarization for interlayer dielectric

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate
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Planarization method for flash memory device

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Planarization method of manufacturing a superjunction device

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