Physically defined varactor in a CMOS process

Details Physically defined varactor in a CMOS process Physically defined varactor in a CMOS process

2005-02-01

2005-02-01

Whitehead, Jr., Carl (Department: 2829)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C700S121000

Reexamination Certificate

active

06849488

ABSTRACT:
A differential varactor is physically defined in a CMOS process using a using the diffusion mask of a polycide gate rather than a P (+) mask, as is commonly used. The differential CMOS varactor may be used in a a phase locked loop (PLL) of a voltage-controlled oscillator (VCO) to enable a transceiver to communicate at OC-3/STM-1 data rates using SONET/SDH signaling formats.

REFERENCES:
patent: 4753898 (1988-06-01), Parrillo et al.
Altmann, M. et al., A Low-Power CMOS 155Mb/s Transceiver for SONET/SDH over Coax & Fibre, 2001 Custom Integrated Circuits Conference, 4 pages.

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