Pitch multiplication process

Details Pitch multiplication process Pitch multiplication process

2007-04-24

2007-04-24

Nguyen, Tuan H. (Department: 2813)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S151000, C257S390000, C257S347000

Reexamination Certificate

active

10997936

ABSTRACT:
A method for multiplying the pitch of a semiconductor device is disclosed. The method includes forming a patterned mask layer on a first layer, where the patterned mask layer has a first line width. The first layer can then be etched to form a first plurality of sloped sidewalls. After removing a portion of the patterned mask so that the patterned mask layer has a second line width less than the first line width, the first layer can be etched again to form a second plurality of sloped sidewalls. The patterned mask layer can then be removed. The first layer can be etched again to form a third plurality of sloped sidewalls. The first plurality of sloped sidewalls, the second plurality of sloped sidewalls, and the third plurality of sloped sidewalls can form an array of parallel triangular channels.

REFERENCES:
patent: 6864520 (2005-03-01), Fischetti et al.
patent: 2004/0264246 (2004-12-01), Sakui et al.
patent: 2006/0157709 (2006-07-01), Green
Saito et al,“Suppression of Short Channel Effect in Triangular Parallel Wire Channel MOSFETs,”IEICE Trans. Electron., vol. E85-C, No. 5, pp. 1073-1078, May 2002.

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