LandOfFree - US Patents - Listing for Semiconductor device manufacturing: process,Making field effect device having pair of active regions...,Having insulated gate

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Buried contact structure in semiconductor device and method...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Buried digit spacer-separated capacitor array

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Buried guard rings and method for forming the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Buried layer and method

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Buried local interconnect

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Buried metal dual damascene plate capacitor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Buried PIP capacitor for mixed-mode process

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Buried shallow trench isolation and method for forming the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Buried strap contact for a storage capacitor and method for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Buried strap for DRAM using junction isolation technique

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Buried strap for trench storage capacitors in dram trench cells

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Buried strap poly etch back (BSPE) process

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Buried strap with limited outdiffusion and vertical...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Buried stress isolation for high-performance CMOS technology

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Buried-channel MOS transistor and process of producing same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Buried-channel transistor with reduced leakage current

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Buried-strap formation in a dram trench capacitor

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Butted source contact and well strap

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Capacitance element and method of manufacturing the same