Buried-channel transistor with reduced leakage current

Details Buried-channel transistor with reduced leakage current Buried-channel transistor with reduced leakage current

2005-04-19

2005-04-19

Niebling, John F. (Department: 2812)

Semiconductor device manufacturing: process

Making field effect device having pair of active regions...

Having insulated gate

C438S217000, C438S291000, C438S218000, C438S228000

Reexamination Certificate

active

06881634

ABSTRACT:
In one embodiment, a buried-channel transistor is fabricated by masking a portion of an active region adjacent to a trench and implanting a dopant in an exposed portion of the active region to adjust a threshold voltage of the transistor. By masking a portion of the active region, the dopant is substantially prevented from getting in a region near an edge of the trench. Among other advantages, this results in reduced leakage current.

REFERENCES:
patent: 4906584 (1990-03-01), Blouke et al.
patent: 5489794 (1996-02-01), Nonaka et al.
patent: 5795803 (1998-08-01), Takamura et al.
patent: 6187643 (2001-02-01), Borland
patent: 6251718 (2001-06-01), Akamatsu et al.
patent: 6294416 (2001-09-01), Wu
patent: 6297082 (2001-10-01), Lin et al.
patent: 6448121 (2002-09-01), Brighton
patent: 6514810 (2003-02-01), Kim et al.
patent: 6548359 (2003-04-01), Houston et al.

Affiliated with

Also associated with

Rating

Buried-channel transistor with reduced leakage current does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Buried-channel transistor with reduced leakage current, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Buried-channel transistor with reduced leakage current will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3386755