Buried strap contact for a storage capacitor and method for...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

Reexamination Certificate

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Details

C438S248000, C438S386000, C438S391000

Reexamination Certificate

active

10875787

ABSTRACT:
A buried strap contact between a trench capacitor of a memory cell and the subsequently formed selection transistor of the memory cell is fabricated such that the inner capacitor electrode layer is etched back in the trench of the trench capacitor and the uncovered insulator layer is then removed at the trench wall in order to define the region of the buried strap contact area. A liner layer is subsequently deposited in order to cover the inner capacitor electrode layer in the trench and the uncovered trench wall and thus to form a barrier layer. A spacer layer with the material of the inner electrode layer is then formed on the liner layer at the trench wall. Finally, the uncovered liner layer is removed above the inner electrode layer and the trench is filled with the material of the inner electrode layer in order to fabricate the buried strap contact.

REFERENCES:
patent: 5283453 (1994-02-01), Rajeevakumar
patent: 5521114 (1996-05-01), Rajeevakumar
patent: 6404000 (2002-06-01), Divakaruni et al.
patent: 6500707 (2002-12-01), Schrems
patent: 6838335 (2005-01-01), Bonart et al.
patent: 2004/0021163 (2004-02-01), Bonart et al.
patent: 2004/0256665 (2004-12-01), Birner et al.
patent: 101 36 333 (2003-03-01), None
patent: 101 52 549 (2003-05-01), None
patent: 102 33 916 (2003-08-01), None

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