Buried shallow trench isolation and method for forming the same

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having insulated gate

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438424, 438444, 438222, 257510, H01L 21336

Patent

active

060837977

ABSTRACT:
An integrated semiconductor device includes a substrate having a buried shallow trench isolation structure and an epitaxial layer disposed over the substrate and the buried shallow trench isolation structure. The epitaxial layer includes a shallow trench isolation structure that extends over the buried shallow trench isolation structure in the substrate to substantially reduce leakage current in the substrate to prevent device latch-up.

REFERENCES:
patent: 4902639 (1990-02-01), Ford
patent: 5675176 (1997-10-01), Ushiku et al.
patent: 5677564 (1997-10-01), McCormack et al.
patent: 5712185 (1998-01-01), Tsai et al.
patent: 5721173 (1998-02-01), Yano et al.
patent: 5767549 (1998-06-01), Chen et al.
patent: 5937311 (1999-08-01), Nagatomo

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