Predefined critical spaces in IC patterning to reduce line...
Preparation of high-k nitride silicate layers by cyclic...
Preparation of stack high-K gate dielectrics with nitrided...
Preventing cavitation in high aspect ratio dielectric...
Prevention of abnormal WSi.sub.x oxidation by in-situ amorphous
Process flow to reduce spacer undercut phenomena
Process for breaking silicide stringers extending between...
Process for building borderless bitline, wordline amd DRAM...
Process for defining the width of silicon gates using spacers as
Process for device fabrication in which a thin layer of cobalt s
Process for fabricating a floating gate of a flash memory in...
Process for fabricating a self-aligned contact
Process for fabricating a semiconductor device component...
Process for fabricating an electronic integrated circuit and...
Process for fabricating an ONO structure
Process for fabricating field effect transistor with a self-alig
Process for fabricating integrated circuits with dual gate devic
Process for forming a low resistivity titanium silicide...
Process for forming a semiconductor device and a conductive...
Process for forming gate conductors