Search
Selected: All

Predefined critical spaces in IC patterning to reduce line...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Preparation of high-k nitride silicate layers by cyclic...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Preparation of stack high-K gate dielectrics with nitrided...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Preventing cavitation in high aspect ratio dielectric...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Prevention of abnormal WSi.sub.x oxidation by in-situ amorphous

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Process flow to reduce spacer undercut phenomena

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Process for breaking silicide stringers extending between...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Process for building borderless bitline, wordline amd DRAM...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Process for defining the width of silicon gates using spacers as

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Process for device fabrication in which a thin layer of cobalt s

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Process for fabricating a floating gate of a flash memory in...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Process for fabricating a self-aligned contact

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Process for fabricating a semiconductor device component...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Process for fabricating an electronic integrated circuit and...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Process for fabricating an ONO structure

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Process for fabricating field effect transistor with a self-alig

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Process for fabricating integrated circuits with dual gate devic

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Process for forming a low resistivity titanium silicide...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Process for forming a semiconductor device and a conductive...

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Process for forming gate conductors

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate

  [ 0.00 ] – not rated yet Voters 0   Comments 0
  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.