Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Reexamination Certificate
2006-07-04
2006-07-04
Smoot, Stephen W. (Department: 2813)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
C438S671000, C438S736000, C438S739000, C438S947000
Reexamination Certificate
active
07071085
ABSTRACT:
The invention includes an apparatus and a method of manufacturing such apparatus including the steps of: forming a layer to be patterned, forming a photosensitive layer over the layer to be patterned, patterning the photosensitive layer to form a pattern including a horizontal line and a vertical line without a space therebetween, transferring the pattern to the layer to be patterned, forming a second photosensitive layer over the pattern, patterning the second photosensitive layer to form a second pattern including a space aligned between the horizontal line and the vertical line, and transferring the second pattern to the layer to be patterned to form a third pattern including a horizontal line and a vertical line with a space therebetween, the space including a width dimension achievable at a resolution limit of lithography.
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Claims from U.S. Appl. No. 10/852,883, filed May 25, 2004.
Capodieci Luigi
Lukanc Todd P.
McGowan Sarah N.
Reiss Joerg
Spence Christopher A.
Advanced Micro Devices , Inc.
Renner , Otto, Boisselle & Sklar, LLP
Smoot Stephen W.
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