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Add-compare-select accelerator using pre-compare-select-add...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Add-compare-select arithmetic unit for Viterbi decoder

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Add-compare-select processor in Viterbi decoder

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
Patent

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Address and TMS gating circuitry for TAP control circuit

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Address conversion circuit and address conversion system...

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Address conversion device for nonvolatile memory

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Address counter for addressing synchronous high-frequency...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Address counter test mode for memory device

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Address decoding system and method for failure toleration in...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Address error detection by merging a polynomial-based CRC...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Address generation apparatus for turbo interleaver and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Data formatting to improve error detection correction...
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Address generation for contention-free memory mappings of...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Address generator

Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
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Address generator for block interleaving

Error detection/correction and fault detection/recovery – Pulse or data error handling – Data formatting to improve error detection correction...
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Address generator for generating addresses for testing a...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital logic testing
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Address generator, interleave unit, deinterleaver unit, and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Data formatting to improve error detection correction...
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Address information detecting apparatus and address...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Digital data error correction
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Address parity error processing method, and apparatus and...

Error detection/correction and fault detection/recovery – Pulse or data error handling – Error/fault detection technique
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Address routing in a protocol analyzer

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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Address selection for testing of a microprocessor

Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
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