Address and TMS gating circuitry for TAP control circuit

Details Address and TMS gating circuitry for TAP control circuit Address and TMS gating circuitry for TAP control circuit

2011-01-25

2011-01-25

Britt, Cynthia (Department: 2117)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital logic testing

C714S734000

Reexamination Certificate

active

07877653

ABSTRACT:
The disclosure provides a novel method and apparatus for inputting addresses to devices to select the device TAP for access. Further, the disclosure provides a novel method and apparatus for inputting addresses for selecting device TAPs and for inputting commands for commanding circuitry within the device. The inputting of addresses or the inputting of addresses and commands is initiated by a control bit input on TDI that is recognized during the Run Test/Idle, Pause-DR or Pause-IR TAP states.

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