Address information detecting apparatus and address...

Details Address information detecting apparatus and address... Address information detecting apparatus and address...

2005-11-01

2005-11-01

Decady, Albert (Department: 2133)

Error detection/correction and fault detection/recovery

Pulse or data error handling

Digital data error correction

C714S768000, C714S770000, C714S805000

Reexamination Certificate

active

06961892

ABSTRACT:
An address information detecting apparatus in accordance with the present invention is arranged such that a first interpolation address generating section generates a first interpolation address according to a consistent signal supplied from an address comparison section, and a second interpolation address generating section generates a second interpolation address according to an error detection signal supplied from a CRC error detecting section. When a detected address is consistent with at least either of the first and second interpolation addresses and also no error is discovered according to the error detection signal, the detected address is adopted as absolute location information, whereas in situations other than the above, the first interpolation address is adopted as the absolute location information. On this account, even if an address error is mis-detected, the malfunction of the apparatus is prevented and proper recording/reproduction can be carried out.

REFERENCES:
patent: 4712141 (1987-12-01), Tomohisa et al.
patent: 5621743 (1997-04-01), Tomisawa
patent: 5715021 (1998-02-01), Gibeau et al.
patent: 6243331 (2001-06-01), Sakamoto et al.
patent: 6643228 (2003-11-01), Van Nieuwenhoven
patent: 04-044688 (1992-02-01), None
patent: 11-031365 (1999-02-01), None

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