Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
1999-10-19
2004-09-14
Lamarre, Guy J. (Department: 2133)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
C365S185090, C365S185330
Reexamination Certificate
active
06792565
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to an address conversion device for a nonvolatile memory, specifically a device which prevents designation of a damaged address in the nonvolatile memory.
2. Description of the Related Art
Flash memories have nonvolatile characteristics and capability of electric data erasure, data writing, and data reading. Furthermore, flash memories are particularly advantageous in that data can be accomplished in a relatively short amount of time as compared to EEPROM. Due to this superiority, flash memories of small and large capacities have come to be widely used. For example, small capacity flash memories can be found incorporated into a one-chip microcomputer as a program memory or a data memory, while large capacity flash memories are commonly provided on a substrate of a microprocessor as a peripheral circuit.
In manufacturing of flash memories, memory cells adapted to normal erasure, writing, and reading operation must be made. However, in actuality, it is extremely difficult to produce a flash memory in which all memory cells correctly function. Particularly, the difficulty of manufacturing large capacity flash memories results in a large number of damaged cells.
Because of this problem, to save damaged cells, a redundant circuit is commonly provided as a peripheral circuit for a flash memory.
Specifically, large capacity flash memories are divided into a plurality of sectors each storing program data, table data, and so on. In an example wherein one word comprises 16 bits and one sector comprises 1K words, a 16M-bit flash memory will comprise 1K sectors.
Providing redundant circuits, circuits for saving damaged flash memory cells in every sector, is expensive due to the large scale, and therefore only a small number of sectors (such as four sectors) can be saved. Therefore, when the number of defective sectors exceeds the number of savable sectors (4/1000), the flash memory itself must be treated as defective, thereby lowering manufacturing yield. Also, use of an external tester by a redundant circuit saving damaged cells may prolong testing times, which further increases manufacturing costs of flash memories.
SUMMARY OF THE INVENTION
The present invention aims at reduction of flash memory prices and improvement of manufacturing yields.
A nonvolatile memory of the present invention comprises a table wherein address data relating to a first memory region is written at an address corresponding to an address other than a damaged address in the first memory region in the nonvolatile memory, and substitutional address data relating to a second memory region is written at an address corresponding to a damaged address in the first memory region in the nonvolatile memory. With this arrangement, supplied address data which corresponds to the damaged address in the first memory region can be converted into address data which corresponds to the address in the second memory region.
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Hogan & Hartson LLP
Lamarre Guy J.
Sanyo Electric Co,. Ltd.
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